| Manufacturer | Part # | Datasheet | Description |
 STMicroelectronics |
STM32WL55JC
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JC
|
3Mb/147P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
July 2021
|
|
STM32WL55JCI6TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCI6TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCI6XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCI6XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCI7TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCI7TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCI7XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCI7XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU6TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU6TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU6XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU6XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU7TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU7TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU7XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCU7XXX
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCY6TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|
|
STM32WL55JCY6TR
|
2Mb/145P
|
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+ LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
November 2020 Rev 1
|