| Manufacturer | Part # | Datasheet | Description |
 Texas Instruments |
CD74HC10
|
41Kb/6P
|
High Speed CMOS Logic Triple 3-Input NAND Gate
|
|
CD74HC10
|
265Kb/10P
|
High-Speed CMOS Logic Triple 3-Input NAND Gate
|
|
CD74HC10
|
261Kb/11P
|
High-Speed CMOS Logic Triple 3-Input NAND Gate
|
|
CD74HC10
|
32Kb/5P
|
High-Speed CMOS Logic Triple 3-Input NAND Gate
|
|
CD74HC10
|
614Kb/15P
|
High-Speed CMOS Logic Triple 3-Input NAND Gate
|
|
CD74HC10
|
1Mb/26P
|
CDx4HC10 Triple 3-Input NAND Gates
REVISED JULY 2021
|
|
CD74HC107
|
56Kb/8P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107
|
451Kb/15P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107
|
624Kb/16P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107
|
609Kb/20P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
Revised October 2003
|
|
CD74HC107E
|
56Kb/8P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107E
|
266Kb/11P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107E
|
451Kb/15P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107E
|
624Kb/16P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107E
|
609Kb/20P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
Revised October 2003
|
|
CD74HC107E.A
|
609Kb/20P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
Revised October 2003
|
|
CD74HC107EE4
|
451Kb/15P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107EE4
|
624Kb/16P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
|
CD74HC107EE4
|
609Kb/20P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
Revised October 2003
|
|
CD74HC107M
|
56Kb/8P
|
Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|