The 74HC125 is identical in pinout to the LS125. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The HC125 noninverting buffer is designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems. The device has four separate output enables that are active−low.

Features
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 μA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the JEDEC Standard No. 7A Requirements
• ESD Performance: HBM  2000 V; Machine Model  200 V
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• These are Pb−Free Devices