FEATURES
 Single-Chip Transceiver for DS3 and E3
 Performs Receive Clock/Data Recovery and
Transmit Waveshaping for DS3 and E3
 Jitter Attenuator can be Placed Either in the
Receive or Transmit Path
 Interfaces to 75 Coaxial Cable at Lengths Up to
380 Meters or 1246 Feet (DS3), or 440 Meters or
1443 Feet (E3)
 Uses 1:2 Transformers on Both Tx and Rx
 On-Chip DS3 (M23 or C-Bit) and E3 (G.751 or
G.832) Framer
 Built-In HDLC Controller with 256-Byte FIFO for
the Insertion/Extraction of DS3 PMDL, G.751 Sn
Bit, and G.832 NR/GC Bytes
 On-Chip BERT for PRBS and Repetitive Pattern
Generation, Detection and Analysis
 Large Performance-Monitoring Counters for
Accumulation Intervals of At Least 1 Second
 Flexible Overhead Insertion/Extraction Port for
DS3, E3 Framers
 Loopbacks Include Line, Diagnostic, Framer,
Payload, and Analog with Capabilities to Insert
AIS in the Directions Away from Loopback
Directions
 Integrated Clock Rate Adapter to Generate the
Remaining Internally Required 44.736MHz (DS3)
and 34.368MHz (E3) from a Single-Clock
Reference Source
 CLAD Reference Clock can be 44.736MHz,
34.368MHz, 77.76MHz, 51.84MHz, or 19.44MHz
 Software Compatible with DS3171–DS3174 SCT
Product Family
 8-/16-Bit Parallel and Slave SPI Serial (≤ 10Mbps)
Microprocessor Interface
 Low-Power (0.5W) 3.3V Operation (5V Tolerant I/O)
 100-Pin Small 11mm x 11mm (1mm) CSBGA
 Industrial Temperature Operation: -40°C to +85°C
 IEEE 1149.1 JTAG Test Port