Features
■ INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY
■ AUTOMATIC POWER-FAIL CHIP DESELECT AND WRITE PROTECTION
■ MICROPROCESSOR POWER-ON RESET (RESET VALID EVEN DURING BATTERY BACK-UP MODE)
■ BATTERY LOW PIN - PROVIDES WARNING OF BATTERY END-OF-LIFE
■ WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage):
■ M48Z129Y: 4.2V ≤ VPFD ≤ 4.5V
■ M48Z129V: 2.7V ≤ VPFD ≤ 3.0V
■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES
■ 10 YEARS OF DATA RETENTION IN THE ABSENCE OF POWER
■ PIN AND FUNCTION COMPATIBLE WITH JEDEC STANDARD 128Kb x 8 SRAMS
■ SELF CONTAINED BATTERY IN DIP