description
These latches are ideally suited for use as temporary
storage for binary information between processing units
and input/output or indicator units. Information present
ata date (D) input is transferred to the Q output when
the enable (C) is high and the Q output will follow the
data input as long as the enable remains high. Whon the
enable goes low, the information (that was present at
the data input at the time the wransition occurred) is
retained at the Q output unti the enable is permitted to
go high
The 75 and "S75 feature complementary Q and T
outputs from a 4-bit latch, and are available in various
16-pin_ packages. For higher component density
applications, the "77 and 1577 4-bit latches are available
in 14.pin fat packages.
These circuits are completely compatible with al popular
TTL families. All inputs are diods-clamped to minimize
transmission line effects and simply system design.
Series 54 and 54LS devices are characterized for
operation over the full military temperature range of
55°C to 125°C; Series 74, and 74LS devices are
characterized for operation from 0°C to 70°C.