Description
The MK2722 is a low cost, low jitter, high performance clock synthesizer designed for Sigma Designs’ MPEG decoder systems. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal or clock input to produce multiple output clocks. The power down pin turns off the device, drawing less than 100 µA.

Features
• Packaged in 16 pin narrow (150 mil) SOIC
• Uses 27 MHz crystal or clock input
• Zero ppm synthesis error in all clocks (audio clocks exactly track 27 MHz video clock)
• Audio clock supports 32, 44.1, and 48kHz sampling rates at 256X and 384X
• Power down turns off chip
• Low jitter
• Total of four output clocks
• 25 mA output drive capability at TTL levels
• 5V±10% supply voltage (contact ICS for 3.3V operation)
• Advanced, low power, sub-micron CMOS process