The HSP43891/883 is a video-speed Digital Filter (DF) designed to efficiently implement vector operations such as FIR digital filters. It is comprised of eight filter cells cascaded internally and a shift and add output stage, all in a single integrated circuit. Each filter cell contains a 9 x 9 two’s complement multiplier, three decimation registers and a 26-bit accumulator. The output stage contains an additional 26-bit accumulator which can add the contents of any filter cell accumulator to the output stage accumulator shifted right by 8-bits. The HSP43891/883 has a maximum sample rate of 25.6MHz. The effective multiply-accumulate (mac) rate is 204MHz.

Features
• This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
• 0MHz to 25.6MHz Sample Rate
• Eight Filter Cells
• 9-Bit Coefficients and Signal Data
• Low Power CMOS Operation
    - ICCSB = 500µA Maximum
    - ICCOP = 160µA Maximum at 20MHz
• 26-Bit Accumulator per Stage
• Filter Lengths Up to 1032 Taps
• Expandable Coefficient Size, Data Size and Filter Length
• Decimation by 2, 3 or 4

Applications
• 1-D and 2-D FIR Filters
• Radar/Sonar
• Digital Video
• Adaptive Filters
• Echo Cancellation
• Complex Multiply-Add
• Sample Rate Converter